The present invention relates to a semiconductor device and a GaN-based field effect transistor suitably used for the semiconductor device, and more particularly, it relates to a field effect transistor (FET) integrated structure capable of substantially reducing an area of an electrode formed on the FET, which in turn reduces the entire semiconductor device of large current drive. Additionally, the present invention relates to a GaN-based FET that has a small ON resistance and can easily realize a pinch-off state, a high-temperature operation, and large-current drive.
Recently, an FET having MIS (metal-insulator-semiconductor) structure has been developed, in which a GaAs-based material is the main compound semiconductor used.
The GaAs-based FET is normally produced as follows.
Firstly, on a substrate such as a sapphire substrate, a semi-insulating layer is formed of non-doped GaAs by using the MOCVD method for example. Furthermore, an active layer of Si doped n-AlGaAs is formed on the semi-insulating layer. Then, on this active layer, an SiO2 film is formed by the plasma CVD method for example, and photolithography and etching are performed to form an opening of a desired pattern.
Furthermore, from the opening, a predetermined electrode material is deposited, thereby forming operation electrodes such as a gate electrode, a source electrode, and a drain electrode on the aforementioned active layer (Si doped nAlGaAs layer) so as to constitute a planar type FET.
Recently, the FET is widely used as a switching element mounted on an automobile. The FET for such an application field should reduce its weight and size and should be able to operate under a high temperature, considering the temperature in an engine room. Moreover, such application requires capability of large-current drive. For the latter requirement, the aforementioned GaAs-based FET does not exhibit a satisfactory characteristic.
As part of making their invention, the inventors have recognized that, on the other hand, the GaN-based compound semiconductor such as GaN, AlGaN, and InGaAlN can operate at a high temperature as compared to GaAs and Si. Moreover, they have a wide discontinuous band gap at the hetero-junction boundary and if they are used as the active layer on which a gate electrode is formed, it is possible to obtain an FET capable of operating under a high temperature and a high voltage can be applied to the FET.
It is therefore an object of the present invention to provide a semiconductor device that is an FET integrated structure that can substantially reduce the area of the electrode formed on the surface of the FET structure and can reduce the size of the entire device.
Another object of the present invention to provide a semiconductor device using an FET having a small ON resistance during operation and a large-current drive.
Still another object of the present invention is to provide a GaN-based FET having a small ON resistance, not causing leak current, and having a structure capable of easily obtaining a pinch-off state, i.e., to provide a GaN-based FET that can preferably be used as an FET for the aforementioned semiconductor device.
In order to achieve the aforementioned objects, the present invention provides a semiconductor device comprising:
at least one field effect transistor plainly arranged so as to form one block;
at least one field effect transistor plainly arranged on the one block so as to form another block; and
a gate electrode, a source electrode, and a drain electrode formed on the surface of each of the field effect transistors;
wherein the gate electrode, the source electrode, and the drain electrode of the field effect transistor of the one block are directly joined with the gate electrode, the source electrode, and the drain electrode of the field effect transistor of the other block, respectively.
Moreover, the present invention provides a GaN-based field effect transistor to be used in the aforementioned semiconductor device, the transistor comprising a lower electrode formed from the same material as a gate electrode to be formed and patterned on the same plane as the gate electrode directly on a semi-insulating substrate; an active layer having at least one layer formed from a GaN-based compound semiconductor where the lower electrode is buried; and the gate electrode formed on the upper surface of the active layer so that the gate electrode and the lower electrode vertically sandwich the active layer.